FreeBSD Developer Summit: Clock and Power Domains
Overview
This is planned as a 'plan and hack' group, to finally work on clock and power domains for FreeBSD. Since ARM, PowerPC, and probably even newer Intel SoCs can have multiple clock and power managers, which may not even be a given device's bus parent, we need a way to handle each one.
The purpose of this working group is to design a power management framework that can be used not only for suspend/resume, but also for runtime dynamic power management.
Goals
By the end of this, we should have an API at least started, with some code examples that can be continued beyond the working group session. My ultimate goal of this is to get it into FreeBSD 11 before the release, so from the working group we'll have about 9 months to get it ready.
Topics
# |
Topic Description |
1 |
What we have now for power management |
2 |
Where we want to go (long term) |
3 |
Incremental improvements that can be made now |
4 |
Let's start hacking |
Attending
In order to attend you need register for the developer summit as well as by email for the session and be confirmed by the working group organizer. Follow the guidelines described on the main page or what you received by email. For questions or if in doubt ask jhibbits@freebsd.org
Please do NOT add yourself here. Your name will appear automatically once you have received the confirmation email. You need to put your name on the general developer summit attendees list though.
Name |
Username / Affiliation |
Topics of Interest |
Notes |
ARM Ltd |
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Xinuos |
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jhb |
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jhibbits |
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Session chair |
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zbb |
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Here to learn new things |
Notes
Results
(Add a list or attach slides detailing the achieved results here.) Introduction
· Very little support currently in FreeBSD for power and clock management
Goals
· Create an API prior to FreeBSD 11 with advanced functionality.
· Both Andy Wafaa and Eric le Blan described the use in both BIG and LITTLE platforms
· Measurement should be relative (such as performance per watt) to achieve Eco-efficiency (GreenIT) standards (which are not yet well defined) Objectives of the API
· The notes of the previous BSDCan meeting were discussed, including the use of Dtrace
· Core design should include:
- ABSTRACTION: the Linux implementation was regarded as very rigid and hard to maintain
- CENTRALISED Management
- EXTENSIBLE, to provide future proofing
Use Cases
· Several use cases were looked at, and all pointed to the management of “resources”
· From the use cases, two groups of resources were identified for both clock and power management.
- ‘Normal resources’ including most I/O devices
- ‘Special resources’ being CPU, cache and memory, although Justin gave some examples of ‘special resources’ presenting themselves as PCI
· For the ‘normal resources’, clock and power management include:
- NO control
- OFF state
- ON state
- INTERMEDIATE states.
Work Process
· It was agreed to carry incremental builds of the API, with added functionality at each build.
· The project is forward looking; past implementation such as APM are not relevant.
First API
· The first API implements a cleaner abstraction, with the implementation of multiplanes against interfaces and not devices.
· The work is based on the current ‘suspend/resume’ functionality available in FreeBSD and implements the following processes:
- ADD Planes; these planes may be platform specific.
- ENUMERATE planes, with a hierarchy.
- POPULATE the planes.
· Through the use cases, several challenges emerged:
- A device may have more than one child, which does not have the same parent The design for multiple parents per device was discussed.
- The concept of early and late domains (plane order) was discussed.
- It is possible to create a skeleton device tree to solve some of these challenges
Second API
· The goal of the second API will be to integrate the management of clocks.
· It is likely to look at on/off states only as intermediate states also require a management of the power (voltage variance) External support
· Andy Wafaa very kindly committed to provide documentation and real examples of how power and clock management has been implemented at Arm Holdings, to speed up development.
Additional links
Clock domain implementation: https://github.com/strejda/qualcomm/tree/master/sys/dev/clk
- Notes:
Requires !SoC specific clock classes plus a description per clock generator. Example: https://github.com/strejda/qualcomm/tree/master/sys/arm/qualcomm/apq8064
- Notes: