1 --- sys/i386/i386/in_cksum.c.back	2007-07-17 18:32:52.000000000 +0000
   2 +++ sys/i386/i386/in_cksum.c	2007-07-17 19:07:35.000000000 +0000
   3 @@ -259,7 +259,7 @@
   4   * load the value into a register but will not use it.  Since modern CPUs
   5   * reorder operations, this will generally take place in parallel with
   6   * other calculations.
   7 - */
   8 + *
   9  #define ADD(n)	__asm __volatile \
  10  		("addl %1, %0" : "+r" (sum) : \
  11  		"g" (((const u_int32_t *)w)[n / 4]))
  12 @@ -270,6 +270,9 @@
  13  		("" : : "r" (((const u_int32_t *)w)[n / 4]))
  14  #define MOP	__asm __volatile \
  15  		("adcl         $0, %0" : "+r" (sum))
  16 + * remove those macros because gcc will insert add instructions 
  17 + * between __asm expressions
  18 + */
  19  
  20  u_short
  21  in_cksum_skip(m, len, skip)
  22 @@ -341,15 +344,25 @@
  23  		 * Advance to a 486 cache line boundary.
  24  		 */
  25  		if (4 & (int) w && mlen >= 4) {
  26 -			ADD(0);
  27 -			MOP;
  28 +		/*	ADD(0);
  29 +			MOP;*/
  30 +		  	__asm volatile ("addl %1, %0 \n"
  31 +					"adcl $0, %0"
  32 +	 				: "+r" (sum) 
  33 +					: "g" (((const unsigned int *)w)[0 / 4]));
  34  			w += 2;
  35  			mlen -= 4;
  36  		}
  37  		if (8 & (int) w && mlen >= 8) {
  38 -			ADD(0);
  39 +		/*	ADD(0);
  40  			ADDC(4);
  41 -			MOP;
  42 +			MOP;*/
  43 +			__asm volatile ("addl %1, %0 \n"
  44 +					"adcl %2, %0 \n"
  45 +					"adcl $0, %0"
  46 +   					: "+r" (sum) : 
  47 +					"g" (((const unsigned int *)w)[0 / 4]),
  48 +   					"g" (((const unsigned int *)w)[4 / 4]));
  49  			w += 4;
  50  			mlen -= 8;
  51  		}
  52 @@ -379,7 +392,7 @@
  53  			 * is initially 33 (not 32) to guaranteed that
  54  			 * the LOAD(32) is within bounds.
  55  			 */
  56 -			ADD(16);
  57 +			/* ADD(16);
  58  			ADDC(0);
  59  			ADDC(4);
  60  			ADDC(8);
  61 @@ -388,12 +401,30 @@
  62  			ADDC(20);
  63  			ADDC(24);
  64  			ADDC(28);
  65 -			MOP;
  66 +			MOP; */
  67 +			__asm volatile ("addl %1, %0 \n"
  68 +					"adcl %2, %0 \n"
  69 +					"adcl %3, %0 \n"
  70 +					"adcl %4, %0 \n"
  71 +					"adcl %5, %0 \n"
  72 +					"adcl %7, %0 \n"
  73 +					"adcl %8, %0 \n"
  74 +					"adcl %9, %0 \n"
  75 +					"adcl $0, %0" : "+r" (sum) :
  76 +					"g" (((const unsigned int *)w)[16 / 4]),
  77 +					"g" (((const unsigned int *)w)[0 / 4]),
  78 +					"g" (((const unsigned int *)w)[4 / 4]),
  79 +					"g" (((const unsigned int *)w)[8 / 4]),
  80 +					"g" (((const unsigned int *)w)[12 / 4]),
  81 +					"r" (((const unsigned int *)w)[32 / 4]),
  82 +					"g" (((const unsigned int *)w)[20 / 4]),
  83 +					"g" (((const unsigned int *)w)[24 / 4]),
  84 +					"g" (((const unsigned int *)w)[28 / 4]));
  85  			w += 16;
  86  		}
  87  		mlen += 32 + 1;
  88  		if (mlen >= 32) {
  89 -			ADD(16);
  90 +			/* ADD(16);
  91  			ADDC(0);
  92  			ADDC(4);
  93  			ADDC(8);
  94 @@ -401,23 +432,54 @@
  95  			ADDC(20);
  96  			ADDC(24);
  97  			ADDC(28);
  98 -			MOP;
  99 +			MOP;*/
 100 +			__asm volatile ("addl %1, %0 \n"
 101 +					"adcl %2, %0 \n"
 102 +					"adcl %3, %0 \n"
 103 +					"adcl %4, %0 \n"
 104 +					"adcl %5, %0 \n"
 105 +					"adcl %6, %0 \n"
 106 +					"adcl %7, %0 \n"
 107 +					"adcl %8, %0 \n"
 108 +					"adcl $0, %0" : "+r" (sum) :
 109 +					"g" (((const unsigned int *)w)[16 / 4]),
 110 +					"g" (((const unsigned int *)w)[0 / 4]),
 111 +					"g" (((const unsigned int *)w)[4 / 4]),
 112 +					"g" (((const unsigned int *)w)[8 / 4]),
 113 +					"g" (((const unsigned int *)w)[12 / 4]),
 114 +					"g" (((const unsigned int *)w)[20 / 4]),
 115 +					"g" (((const unsigned int *)w)[24 / 4]),
 116 +					"g" (((const unsigned int *)w)[28 / 4]));
 117  			w += 16;
 118  			mlen -= 32;
 119  		}
 120  		if (mlen >= 16) {
 121 -			ADD(0);
 122 +			/* ADD(0);
 123  			ADDC(4);
 124  			ADDC(8);
 125  			ADDC(12);
 126 -			MOP;
 127 +			MOP;*/
 128 +			__asm volatile ("addl %1, %0 \n"
 129 +					"adcl %2, %0 \n"
 130 +					"adcl %3, %0 \n"
 131 +					"adcl %4, %0 \n"
 132 +					"adcl $0, %0": "+r"(sum): 
 133 +					"g" (((const unsigned int *)w)[0 / 4]),
 134 +					"g" (((const unsigned int *)w)[4 / 4]),
 135 +					"g" (((const unsigned int *)w)[8 / 4]),
 136 +					"g" (((const unsigned int *)w)[12 / 4]));
 137  			w += 8;
 138  			mlen -= 16;
 139  		}
 140  		if (mlen >= 8) {
 141 -			ADD(0);
 142 +			/* ADD(0);
 143  			ADDC(4);
 144 -			MOP;
 145 +			MOP;*/
 146 +			__asm volatile ("addl %1, %0 \n"
 147 +					"adcl %2, %0 \n"
 148 +					"adcl $0, %0": "+r"(sum): 
 149 +					"g" (((const unsigned int *)w)[0 / 4]),
 150 +					"g" (((const unsigned int *)w)[4 / 4]));
 151  			w += 4;
 152  			mlen -= 8;
 153  		}